This invention relates to a method for the manufacture of electrode embedded green sheets by a surround print process, to the electrode embedded green sheets and to electronic components made from said green sheets. Multilayered ceramic components, such as capacitors, varistors, thermistors and other multilayered circuits are exemplary of such electronic components. The invention embodies the use of electrode surround printing and coating densification techniques to produce electrode embedded green sheets which are more uniform, flatter and thinner when compared to the prior art electrode embedded green sheets. In a preferred embodiment, the green sheets are used for multilayered ceramic capacitors (MLC).
MLC's and their structures are well known. Several manufacturing steps are employed for the production of MLC. Current manufacturing techniques favor casting a dielectric of suitable thickness, cutting the dielectric into sheets and then depositing electrodes directly onto a dielectric sheet. Subsequently, other processing steps are effected such as drying and/or compressing the green sheets. The green sheet can be stored and subsequently stripped from the release film for stacking to form a MLC. The electrode patterns of successive sheets are offset from one another. After the desired number of layers has been reached, the sheets are pressed or laminated and cut into individual capacitors, which are sintered or fired. Then, end terminations are formed on the capacitors to provide a means for physical and electrical connection to the circuit.
In each of the various stages or steps of the process, potential problems exist which can affect the quality of the finished capacitor. A critical process step is the build-up or stacking of the layers to produce a bar. This involves laying down a previously cast dielectric sheet onto a build-up stack in progress and then printing the electrode onto the dielectric sheet and drying the electrode before overlaying the print with another dielectric sheet and pressing that sheet down into the previously printed electrode. The potential problem during the build-up process is trying to achieve a uniformly high and flat electrode surface. Other major potential problems that also exist in the initial process steps are providing a dielectric layer where the average thickness and the minimum thickness approach equality and in correctly aligning and stacking the printed sheets.
The presence of bumps in the rough electrode surfaces is known to produce undesirable enhancements of the electrical fields between the dielectric layers. In addition, variations in electrode thickness reduce the dielectric thickness at the bumps to produce non-uniformity and perturbations in the electrical fields. The combination of the reduced dielectric thickness and the disturbed fields caused by the bumps leads to electrical insulation weak spots in the capacitor. Prior art electrode coatings are normally 150 micro-inches thick, are non-uniform and can vary up to 35 to 40% in thickness. These non-uniformities can result in material stresses in the finished capacitor.
Usually, the non-uniformity problem is only partially solved by applying mechanical pressure to deform the dielectric overlay sheet down onto the upper sheet of the stack since the electrode is not completely dry and has no restraint to prevent deformation which limits the amount of pressure that can be applied. Because the edges surrounding the electrode pattern have no abutting material there, the overlay sheet tends to mound up over the electrode pattern and thus, does not eliminate the problem. Further mounding to a lesser degree occurs over each of the electrodes in the pattern. As additional sheets are added and printed, the surface non-uniformity increases and eventually makes printing of a precisely located electrode pattern impossible.
Electrode embedded green sheets are well known in the art.
Wallace, U.S. Pat. No. 4,301,580, discloses embedded electrodes formed by first casting electrodes on a release sheet and then overcasting dielectric material.
Elderbaum, U.S. Pat. No. 4,008,514, discloses forming an electrode pattern on a release film, casting a green sheet over the electrode, printing a second electrode pattern on the green sheet, casting a second green sheet over the second electrode pattern and applying pressure, and then removing the printed sheets from the release film.
Elderbaum, U.S. Pat. No. 3,882,059, discloses a process for producing capacitors comprising the steps of placing an electrode pattern on a release film, placing a ceramic sheet on the pattern and release film and then peeling away the ceramic sheet and pattern from the release surface.
European Appln. 89903265.0 (Pub. No. 0 362 404) includes a detailed discussion of Japanese prior art regarding electrodes embedded in a dielectric.
The basic invention disclosed in the '319 patent was a process which provided precise surface and thickness control for electrode and dielectric layers. The electrode and dielectric layers were compacted in the green state using a calender (opposed rolls applying pressure on the greenware) at the nip point between the rolls to increase substantially the density of both the electrodes and the green body and to impart added smoothness to the deposited layers. This calendering was done layer by layer as well as after two or more layers had been formed and calendered individually or in combinations.
Another innovation disclosed in the '319 patent was to overcoat a previously deposited layer(s), such as electrodes, with a low viscosity green slurry so that the slurry flowed around the previously deposited layer filling in all open areas to a preselected thickness. The term imbedded electrode was used to describe the result of this concept.
The resulting layered green ceramic structure was then an ideal green tape (sheet) from which stacks were made (build-ups) and which upon further processing became MLC capacitors. The process avoided the need to print on top of an uneven non-dense dielectric layer which limited the number of layers in a single structure. The carrier supported material was easy to handle and with the aid of preprinted fiducials on the carrier the sheets could be accurately positioned so that the imbedded electrodes could be aligned properly to gain maximum capacitance benefit while minimizing the loss due to more off-set between the layers than was required to provide alternate layer electrical contact on each side.
In the '319 patent still another innovation was disclosed, specifically what is herein referred to in this disclosure as `surround printing`. As set forth in FIG. 7 of the '319 patent and the corresponding description, it was recognized that there were advantages to printing the electrode pattern on a release film followed by calendering and then casting or printing the dielectric on the release film in those areas where the electrode pattern was not printed and further not overcoating the electrodes in this step of the process. This resulted in surrounding the electrodes while not overcoating the electrodes.
In the parent disclosure, U.S. Pat. No. 5,292,548, the benefits and uniqueness of using the surround-print process to manufacture other layered ceramic structures such as multi-chip modules and hybrid circuits was disclosed, specifically, the advantages of using surround printing as a means of printing conductive vias, circuits or patterns and then later surround printing dielectric around the conductive patterns. The surround printed dielectric provided good boundaries for containment of the conductor during densification which would compact the conductor as well as the dielectric and prevent or reduce the incidence of voids that might lead to discontinuities and failure. Alternatively, dielectric with voids or void patterns could be printed to be followed with fill-in printing on the conductive patterns or vias.
Making high layer count stacks for MLCs, using the prior art processes outlined in the '319 patent, resulted in the stack surfaces showing the imprint of the electrode pattern when the number of layers reached 20-40, depending upon the thickness of the electrode and the dielectric layers. As the surface non-uniformity increased, the problem of precisely locating the next electrode print became untenable. This was one of the problems that the '319 process significantly alleviated as compared to the then prior art standard processing. As was disclosed in the '319 patent, the positional accuracy would begin to diminish at some point as the number of layers increased reducing the yield. For conventionally made capacitors, depending upon the electrode and dielectric layer thickness, the dimensional perfection of the green dielectric tape and the quality of the electrode print could become a problem at 20 to 40 layers and prevented the manufacture at acceptable yields of very high layer count parts. Although the '319 process made possible the production of much higher layer count parts (60 to 100) at acceptable yields, the electrode imprint problem was not totally eliminated. This imprint was really a surface perturbation caused by the denser electrodes not compacting as much as the dielectric during densification and later during the light stacking lamination pressures. This was because the densities of the electrode and the surrounding dielectric were not the same so that one did not compact under pressure as much as the other.
Subsequently, it has been found that the use of the surround print process with calendering of the electrode followed by surround printing of the electrodes with the dielectric and calendering followed by overlay coating and final calendering, produces tape with much less tendency to exhibit the electrode print surface unevenness during stacking, even when stacks having more than 100 layers are made. Further, it has been found that bars made using the process, particularly with the surround printing, have fewer incidents of one or more layers in the stack shifting during lamination.
In conventionally built stacks, it appears that this shifting is due to the dielectric layer being somewhat suspended on the electrode printed on top of the preceding dielectric layer and being less well adhered so that, under lamination pressure, the whole layer moves to better distribute the stress. Because the use of imbedded electrodes and calendering results in more contact surface between the layers, it is believed that the disclosed process is the cause of the reduction in isolated layer shifting during the lamination step.
When the "surround print" method is used for electrodes, the boundaries of the electrodes are better contained during the compaction step than with the non-surround printed electrodes. Both the surround print dielectric layer and the dielectric overlay coating are made using the same or chemically compatible dielectric binder so that they are chemically compatible for good lamination and so that they have the same percentage compaction during calendering. The surround printing results in just as compact electrodes as generally disclosed in the '319 patent but one almost devoid of appendages or bulges which cause the electrodes to have a distorted shape. The surround printing process results in a reduction in the amount of metal used to form the rectangular shaped electrodes as no excess is necessary to allow for bulges or irregular metal flow during the densification step.
With the use of precise registration accuracy, the electrode can be printed first and then surround printed with dielectric or the dielectric with rectangular voids can be printed followed by printing the electrodes in the rectangular void spaces. If both printings are completed before being calendered the resulting "closeness" of the dielectric to the electrode is improved and the compaction level achieved is similar in both.
It has been determined that for the best results, the densities of the electrodes and the dielectric should be as close together as possible.
There are optimum range formulations for both the electrodes and the dielectric as the density of either of the products, before and after densification, is influenced by the choice of materials, the percent solids in each slurry, the particle size, the closeness of match between the dielectric theoretical density as compared to that of the electrode material and the choice of additives. These parameters are selected to ensure that the needed compaction is achieved without distortion regardless of the printing order.
The density difference between the electrodes and the dielectric can be compensated for a limited degree by printing either the electrode or the dielectric to a slightly different height so that the final densities of both, after calendering, approximate target densities. The resulting imbedded, but top exposed electrode, is overlayed with more dielectric to obtain the desired dielectric separation thickness. This technique provides an even smoother final surface to the tape so that stacking of up to 150 to 300 layers is possible while still maintaining positional accuracy.